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Network-on-chip : the next generation of system-on-chip integration / Santanu Kundu, Santanu Chattopadhyay
| Material Type | E-Book |
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| Publisher | Boca Raton, FL : CRC Press, Taylor & Francis Group |
| Year | [2015] |
| Language | English |
| Size | 1 online resource (xvii, 369 pages) : illustrations |
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| Media type | 機械可読データファイル |
|---|---|
| Contents | 1. Introduction 2. Interconnection networks in network-on-chip 3. Architecture design of network-on-chip 4. Evaluation of network-on-chip architectures 5. Application mapping on network-on-chip 6. Low-power techniques for network-on-chip 7. Signal integrity and reliability of network-on-chip 8. Testing of network-on-chip architectures 9. Application-specific network-on-chip synthesis 10. Reconfigurable network-on-chip design 11. Three-dimensional integration of network-on-chip 12. Conclusions and future trends |
| Notes | Addresses the Challenges Associated with System-on-Chip IntegrationNetwork-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design Open Access English Includes bibliographical references Online resource; title from PDF title page (EBSCO, viewed December 6, 2014) |
| Authors | *Kundu, Santanu, Chattopadhyay, Santanu, |
| Subjects | LCSH:Networks on a chip BISACSH:TECHNOLOGY & ENGINEERING -- Mechanical All Subject Search FREE:Networks on a chip BSH:Electronic books |
| Classification | DC23:621.381531 |
| ID | ED00001320 |
| ISBN | 9781466565272 |